When fabricating field effect transistors (FETs), such as fin FETs (FinFETs), device performance can be improved by using a metal gate electrode instead of a polysilicon gate electrode. Formation of the metal gate electrode may include sequentially forming a gate dielectric layer, a barrier layer, a work function layer, and a metal liner layer in a high aspect ratio trench, followed by the trench filling with a fill material. High-k dielectric materials have been used in an effort to reduce gate oxide leakage current while maintaining a desired gate capacitance value. However, high-k dielectrics may suffer from high densities of defects which compromise the device performance. However, with the decreasing in scaling, new challenges are presented.